BCA IGNOU

Ql(a). Do the arithmetic addition using binary 2’s complement notation in the following. Assume a register size of 8-bits. Indicate the state of overflow or underflow in each case.

(b) Show that {NOR} is a functionally complete set of gates. Use it to construct the OR, AND and NOT gates.

© Simplify the following Boolean function in the sum-of-product from using a Karnaugh map. Draw the resultant logic diagram using logic gates.
F(A,B,C,D) = 2(3,5,6>8,10,ll,14,15)

(d) The 8-bit registers in a processor have the following values:
AL—11110000
BL— 01000011
CL— 00110011
DL—11110001
What will the values of the register be when the following operations are per formed?

(e)Write a program in 8086 Assembly Language that takes three numbers (of size 8 bits) stored in data segment, calculates their average and then outputs the result on the monitor.

Image no.5

Define the IEEE 754 floating point number standard giving the single and Viouble’prerision floating point number bit’s layout and bias of exponent Also show an example each of addition and subtraction of two floating-point numbers. IEEE Standard Floating Point Float:

Q2 a) You are given four 3X8 decoders. Design a 5X32 decoder using these four decoders.

(b) Write an 8086 assembly program that checks whether a small string is a substring ofa larger string. You may assume a 20-byte long string and a 4-byte long sub-string in the data segment of the program.

© What is a microinstruction? How is it different from an instruction? What formats are used for microinstructions? Explain with the help of an example each.

Q3(a).Explain two major differences between a synchronous and asynchronous Draw the logic diagram of a 4-bit ripple counter.

(B) Give one example (from 8086):
(i) Immediate addressing mode
(ii) Direct addressing mode
(iii) Register-indirect addressing mode
(iv) Based-indirect addressing mode
(v) Based-indexed addressing modi

©.How can a parity bit be used for checking error in a single bit? Example the Process with the help of a diagram.

(d) What are the advantages/disadvantages of using a Parity bit?

(e) How is a parity bit related to a single-error correcting code?

Q4(a). Give at least two advantages/disadvantages of using a higher number of operand addresses in a machine instruction. What is evaluation stack architec ture? Explain with the help of an example, how this machine can be used for evaluating an expression A * B + C - D.

(b)Write a procedure in 8086 assembly which sums 2 numbers passed as parameters to it and returns the result. Also, write the relevant calling code in the calling assembly program. Make suitable assumptions, if any.

© What is the mechanism of handling Interrupt driven Input/Output? Explain using a flow chart. What methods can be used to handle multiple interrupts?

Q5(a). What is RAID? What are RAID levels? Explain any two giving data distribution and advantages/disadvantages of that level.

(b) What is a Bus? Why is it used? How does Bus size influence size of memory addresses? Explain any one Bus arbitration scheme.

© (i) What are the differences in representation of Floating point and Fixed point “umbers?

(ii) What are the four important differences between associative mappings and set associative mapping in cache?

(iii) List three important differences between CRT (Cathode Ray Tube) and LCD (Liquid Crystal Display) displays.

Q6. Describe the following in the context of computer organization and 8086 microprocessor, with the help of an example, if necessary:

(i) Use of Interrupt 21H for data string input

(ii) Characteristics of von Neumann machine

(iii) Types of programmer visible registers.

(iv) Selective complement and Insert operation

(v) Addition of two 8-bit register in 8086 having packed BCD numbers